1. Field of the Invention
The invention relates to a thin film transistor (TFT), a method of fabricating a TFT, and a pixel structure.
2. Description of Related Art
The increasing progress of display technologies brings about great conveniences to people's daily lives. As such, flat panel displays (FPDs) featuring compactness become the main stream display products at present. Among various types of FPDs, liquid crystal displays (LCDs) have superb characteristics, such as high space utilization efficiency, low power consumption, no radiation, and low electromagnetic interference, so that the LCDs have been prevailing. TFTs are often applied to the displays, and therefore structures of the TFTs make a direct impact on performance of the products. Generally, a TFT at least includes a gate, a source, a drain, and a channel layer. Conductivity of the channel layer is determined by changing the voltage applied to the gate. Specifically, the source and the drain are electrically conducted with each other when the channel layer is turned on, and the source and the drain are electrically insulated from each other when the channel layer is turned off.
FIG. 1 is a schematic top view illustrating a conventional TFT. With reference to FIG. 1, the TFT normally has a gate G, a channel CH located above the gate G, and a source S and a drain D that are located above the channel CH. In such a TFT, the drain D extends from the source S. It can be learned from FIG. 1 that the drain D located above the channel CH/ the gate G (as marked by the reference number “10”) has a line width different from a line width of the drain D extending away from the channel CH (as marked by the reference number “20”). This is mainly because the film profile affects critical dimension (CD) of photoresist patterns in an exposing process during fabrication of the TFT. That is to say, although the device patterns in the photo mask have the same line width, the photoresist layer is not exposed to the same degree in the exposing process, given the film layers below the photoresist layer have different heights and thus the thickness of the photoresist layer is changed. Thereby, the CD of the photoresist patterns may differ after the photoresist layer is patterned. Said difference leads to the issue of the drain D having different line widths as shown in FIG. 1.
If the CD of the photoresist patterns is excessively large, cross-talk effects are likely to occur in the devices. By contrast, if the CD of the photoresist patterns is overly small, the devices may encounter issues of excessive resistance value, broken lines, or short circuit. Accordingly, research and development are mainly geared towards the way to improve CD uniformity in the fabricating process of the TFT.